=============================================================================
Intel(r) Server Platforms SE7320VP2 BIOS RELEASE NOTES
=============================================================================
INTEL Enterprise Platform & Services Marketing
Intel Corporation
2111 N.E. 25th Avenue, Hillsboro, OR 97124 USA
=============================================================================
DATE: 		Sep 21, 2005
TO:		Intel server platform SE7320VP2 customers
SUBJECT:	BIOS Release Notes: P.06 (build 035)
=============================================================================
Information in this document is provided in connection with Intel products. 
No license, express or implied, by estoppel or otherwise, to any intellectual 
property rights is granted by this document. Except as provided in Intel's 
Terms and Conditions of Sale for such products, Intel assumes no liability 
whatsoever, and Intel disclaims any express or implied warranty, relating to 
sale and/or use of Intel products including liability or warranties relating 
to fitness for a particular purpose, merchantability, or infringement of any 
patent, copyright or other intellectual property right. Intel Corporation may 
have patents or pending patent applications, trademarks, copyrights, or other 
intellectual property rights that relate to the presented subject matter. The 
furnishing of documents and other materials and information does not provide 
any license, express or implied, by estoppel or otherwise, to any such 
patents, trademarks, copyrights, or other intellectual property rights.  
Intel products are not intended for use in medical, life saving, or life 
sustaining applications. Intel may make changes to specifications and product 
descriptions at any time, without notice.

Intel is a registered trademark of Intel Corporation. 

*Other names and brands are the property of their respective owners.

Copyright (c) 2004 Intel Corporation.

=============================================================================
                              ABOUT THIS RELEASE
=============================================================================
Build #	: 035
Build Stamp	: Volcano Peak     SE7320VP20.86B.P.06.00.0035.092020051546
             	  Volcano Peak 2   SE7320VP21.86B.P.06.00.0035.092020051546
Build Date	: 21 Sep 2005

=============================================================================
                           BIOS COMPONENTS/CONTENTS
=============================================================================
Processor stepping(s) supported: Intel(R) Xeon(TM) Processors

Microcode update versions:
Name                Description                           Stepping(s)
-------------       ------------------------------        -------------------
M1DF3417.TXT	    Assembly format, Revision 17          D-0 (Nocona)
MBDF4117.TXT	    Assembly format, Revision 17          E-0 (Nocona)
M9DF4305.TXT	    Assembly format, Revision 05	  N-0 (Irwindale)
M5DF4A02.TXT	    Assembly format, Revision 02	  R-0 (Irwindale)

System hardware configurations supported: Production Revisions of the Server 
Board SE7320VP2 (DDR1) and (DDR2).

=============================================================================
                       SYSTEM FIRMWARE REQUIREMENTS/REVISIONS
=============================================================================
BMC FIRMWARE	:  2.40 
FRU/SDR 	:  1.30 or later

=============================================================================
                           IMPORTANT INSTALLATION NOTES
=============================================================================
IMPORTANT NOTES:

1.	Note the settings of the SETUP parameters.  Enter SETUP by hitting 
	the F2 key during boot up.  Write down the settings for each of 
	parameters. At the end of the BIOS update process you should set the 
	parameters to default values by hitting the F9 key, and then re-enter 
	these values you have written down.

2.	Updating BIOS:
	(1) Copy all of the following files into the same folder on a bootable
	Hard Drive or bootable USB Disk Key :

	    FLASH.BAT
	    AFUDOS.EXE
	    P04.ROM
	
	(2) Go to this folder, run "FLASH.BAT" and wait while the update 
	automatically finishes.

3.	Once the update completes, reboot the system.

4.	Enter Setup by pressing the F2 key during boot up.  Once in Setup, 
	press the F9 to set the parameters back to default values. Re-enter 
	the values you wrote down at the beginning of this process. 
	
=============================================================================
                        BIOS RECOVERY INSTRUCTIONS
=============================================================================

*****************************************
*** USB-Disk Recovery Feature Details ***
*****************************************
- Build Recovery Storage

  1.    Plug in the USB DISK_ON_KEY.
  2.    Boot the system to DOS on a bootable floppy.
  3.    Then from the floppy, format the USB DISK_ON_KEY to FAT 12 or FAT 16.
  4.    Rename ROM file to AMIBOOT.ROM and copy it to the USB DISK_ON_KEY.

- Execute BIOS Recovery

  1.    User Forced Recovery:
        A. Set Recovery Boot Jumper J1H3 (2-3).
        B. Insert the Recovery storage into the USB port.
        C. Power on the system.
        D. The system will boot and display the flash progress.
        E. When the flash is complete, power off system and set jumper back 
	to the Normal position J1H3 (1-2).

  2.	Auto Recovery:
        A. If the system ROM is damaged (checksum BAD), the system will perform 
	the BIOS recovery automatically.

**NOTE** : The recovery only supports the storages of both type FAT12 & FAT16.


*****************************************
***  AMI AFUDOS Flash Feature Details ***
*****************************************
- AFUDOS.EXE V1.33
- This update processing takes 3 to 4 minutes.  Never turn off the system 
  during the update processing. The following message appears when the update 
  processing is finished:

	Reading file ........ done
	Erasing flash ....... done
	Writing flash ....... done
	Verifying flash ..... done
	Erasing BootBlock ... done
	Writing BootBlock ... done
	Verifying BootBlock.. done

  If the system does not restart, TURN THE POWER OFF, THEN ON.

AMI Firmware Update Utility - Version 1.33
Copyright (C)2004 American Megatrends, Inc.  All rights reserved.

	afudos /i<ROM filename> [/o<save ROM filename>] [/n] [/p[b][n][c]]
	[/r<registry_path>] [/s] [/k[N]] [/q] [/h]

	/n    - don't check ROM ID
	/pbnc -
		b - Program Boot Block
		n - Program NVRAM
		c - Destroy System CMOS
	/r    - registry path to store result of operation (Windows version)
	/k    - Program all non-critical block only
	/kN   - Program N'th non-critical block only (from k0/k1/k3 upto k7)
	/c    - Skip non-critical blocks
	/s    - Leave signature in BIOS
	/q    - Silent execution
	/h    - print help
	/t    - Display ROM ID string
        /c    - Program Main BIOS and all Non-critical blocks
        /cN   - Program Main BIOS and N'th Non-critical block (from c0 upto c7)
        /d    - Compare ROM file (skips flashing)
        /u<filename>	-Display ROM ID

=============================================================================
                            KNOWN ISSUES/WORKAROUNDS
=============================================================================
- When running the Flash Utilities (AFUDOS, AFUWIN etc ) do not use the
  following options

	/pn   - for flashing NVRAM Block
	/k    - for flashing all Non-Critical Blocks only
	/c    - for flashing all Non-Critical Blocks along with main BIOS image
	/k0   - for flashing the Non-Critical Block 0 only
	/c0   - for flashing the Non-Critical Block 0 along with main BIOS
	        image

  Since the above options try to flash protected areas NVRAM or Non-Critical
  Block 0 the verification fails.

  Always use the following command to flash a bios

	C:\afudos /iXXXX.ROM /pb /c1 /c2 /n
	
	/i    - Input .ROM file
	/pb   - Flash Boot Block
	/c1   - Flash Non-Critical Block 1 (OEM Logo & User Binaries) along
	        with Main BIOS Image
	/c2   - Flash Non-Critical Block 2 (CPU MicroCode) along with Main BIOS
	        Image
	/n    - don't check ROM ID
	
- The recovery mode support FAT12 and FAT16 only.

- The BIOS setup item "Maximum CPUID Value Limit" must be enabled for
  installing some legacy OSes (NT4.0 for example) which do not support it.


=============================================================================
                              FEATURES ADDED
=============================================================================
Build 035: P.06
-N/A

Build 034: RC02.06
-N/A

Build 033: RC01.06
-Update Update Processor Microcode M1DF3417.pdb for D-0 (Nocona) stepping. 
 Update Update Processor Microcode MBDF4117.pdb for E-0 (Nocona) stepping. 
 Update Update Processor Microcode M9DF4305.pdb for N-0 (Irwindale) stepping. 
 Add new Processor Microcode for M5DF4A02.pdb for R-0 (Irwindale) stepping.
-Update ISM module from ISM_00_01_04 to ISM_00_01_05.
-Least Featured BSP Changes, the new R-0 Irwindale does have an extended feature
 flag set differently than N-0 Irwindale.
-Latest Mixed Processor Stepping Changes.
-Update AMI TAG CORE0195 

Build 032: P.05.10
-N/A

Build 031: P.05
-N/A

Build 030: RC01.05
-When enabling sparing, the DIMM status will automatically update accordingly showing <Spare> instead of just <Installed> for the appropriate DIMMs without having to do a reboot.
-When no FDD presence, the FDD item in BIOS setup menu will be automatically disabled. 
-Processor Mixed Stepping Changes. In mixed stepping systems, all processors must be of the same voltage.If not,BIOS will display any POST error message to identify that.

Build 029: P.04
-SE7320VP2(DDR1)/SE7320VP2(DDR2) BIOS Banner roll from RC03.04 to P.04.

Build 028: RC03.04
-Merged the SE7320VP2(DDR1) & SE7320VP2(DDR2) BIOS's together.
-Removed AMI TAG CPUP40061 (Date: Wed 01-19-2005).
-Added new options in the "PCI Configuration" sub-menu to force PCI devices to 32-bits or 64-bits 
 and control the hightest PCI memory address.

Build 005[SE7320VP2(DDR2)]: B01
-Added option to automatically clear mBMC SEL when full in the "Event Log Configuration" menu.
-Added option to allow user to enable or disable the logging of the "Timestamp Clock Sync" event in the 
"Event Log Configuration" menu.

Build 004[SE7320VP2(DDR2)]: BC01
-Enabled the "MSR_EBC_Soft_Poweron" register bits 1,2,3 to follow the chipset error reporting revision "023". 

Build 003[SE7320VP2(DDR2)]: A01
-Added tokens for SE7320VP2(DDR1) & SE7320VP2(DDR2) version ID's. 

Build 002[SE7320VP2(DDR2)]: AC01
- Updated CPU Microcode M9DF4112.pdb for E0 Stepping processors.

Build 001[SE7320VP2(DDR2)]: X01
- Initial released.

Build 024: P.03 (Production 03.00)
- Banner roll from RC05.03 to P.03

Build 023: RC05.03 (Release Candidate phase for Production 03.00)
- Updated AMI TAG [RBF0018]/[UUID_Patch] for UUID issue.
- Enabled the TM2 for Intel(R) Xeon(TM) 3.6 GHz Processors with FSB 800MHz and processor signatures >= F40h.
- Changed the SMBIOS type 3 chassis manufacturer to 'Intel Corporation'.
- Corrected two strings for setup items "Hardware Prefetcher" and 
  "Adjacent Cache Line Prefetch".
- Updated the Intel(R) Xeon(TM) 3.6 Processor E-0 Stepping production microcode to version 12.
- Updated ISM module from ISM_00_01_03 to ISM_00_01_04. 
  
Build 022: RC04.03 (Release Candidate phase for Production 03.00)
- Added Intel(R) Xeon(TM) Processor N0 stepping CPU Microcode M9df4304.pdb.
- Moved the HW prefetcher and ACL prefetch options from the debug menu to the CPU menu.
  For DP/MP servers, the default should be set based on performance results
  observed during platform validation and testing.
  Currently, both power-on and default values are "Disabled", please remember
  to load the BIOS optimal default values after updating to the new BIOS each time.
- Updated the help txt for the item "Execute Disable Bit" in setup CPU menu to
  "Intel's Execute Disable Bit functionality can prevent certain virus attacks."
- Updated Rolling BIOS from Beta7 to Beta8.
- Updated the ISM module to ISM_00_01_03.
- Improved the USB floppy and CD-ROM hot-plug functionality.
- Updated the function behaviors for Setup Menu - Security: Password Protection.
  Security Table - (V = Visible; S=Shaded)
  +===========+===============+===========+===============+
  |   Admin   | Not installed | Installed |   Installed   |
  |   User    | Not installed | Installed | Not installed |
  +===========+===============+===========+===============+
  | LoginType |               |Admin  User| Admin   Enter |
  +-----------+---------------+-----------+---------------+
  |SetAdminPW |       V       |  V     S  |   V       S   |
  +-----------+---------------+-----------+---------------+
  |SetUserPW  |       S       |  V     V  |   v	      V   |
  +-----------+---------------+-----------+---------------+
  |UserLevel  |       S       |  V     S  |   V       S   |
  +-----------+---------------+-----------+---------------+
  |ClearUserPW|       S       |  V     S  |   S       S   |
  +-----------+---------------+-----------+---------------+
  |PW on Boot |       S       |  V     V  |   S       S   |
  ============+===============+===========+===============+

Build 021: RC03.03 (Release Candidate phase for Production 03.00)
- Updated the Intel(R) Xeon(TM) Processor CPU Microcode M1DF3414.pdb for D0 Stepping, MBDF410D for E0 Stepping.
- Improved the error messages for unsupported riser configurations before the OEM Logo.
- Updated AMI TAG USB0033.1, USB0086, USB0084, USB0082, USB0079, USB0078, BBS0005.1, CORE0153, and CPUP40057.
- Changed error handling to not do an NMI for uncorrectable
  non-fatal errors, this could prevent a system hang during S1 test.
- Made a change to dynamically update slot numbering in the PCI Routing Table per the riser card configuration, and provide this information to the following:
  (a)Setup - PCI Configuration
  (b)System devices summary Screen
  (c)OS system devices management
  (d)SMBIOS Type9
  There are 7 Riser card configurations defined for the SE7320VP2:
  1) 2U system: Full Height 3x66PCIX Riser installed only.
  	          Bottom PCIX Slot ?Full Height PCIX Slot1
	          Middle PCIX Slot ?Full Height PCIX Slot2
	          Top    PCIX Slot ?Full Height PCIX Slot3
  2) 2U system: Full Height 1x66PCIX 1x4PCIE Riser installed only.
	          Bottom PCIX Slot ?Full Height PCIX Slot1
	          Middle PCIE Slot ?Full Height PCIE Slot2
  3) 1U system: Full Height 1x66 Riser installed only.
	          Full Height PCIX Slot1
  4) 1U system: Full Height 1x4 PCIE Riser installed only.
	          Full Height PCIE Slot1
  5) 1U system: Low Profile 1x66 PCIX Riser installed only.
	          Low Profile PCIX Slot1
  6) 1U system: Low Profile 1x66 PCIX Riser + Low Profile 1x66 PCIX Riser installed.
	          Full Height PCIX Slot1
	          Low Profile PCIX Slot2
  7) 1U system: Full Height 1x4 PCIE Riser + Low Profile 1x66 PCIX Riser installed.
	          Full Height PCIE Slot1
	          Low Profile PCIX Slot2

Build 020: RC02.03 (Release Candidate phase for Production 03.00)
- Changed the option ROM enable/disable entries in BIOS Setup to only be visible if an add-in card is installed in the slot, and the add-in card contains an option ROM.
- Corrected an issue where the boot order was not retained after adding a new device.
- Added a fix for the E7320 Chipset erratum #30: PCI EXpress x16 Graphics cards.
- Added a fix for the E7320 Chipset erratum #32: Memory Reference Code was not
  recognizing Address/Command Parity capable ECC DIMMs.
- Intel's formal recommendation for enabling LRU is to clear all bits (13:0).
- Upgraded some new files for the IST module 8.00.10_IST_09A.

Build 019: RC01.03 (Release Candidate phase for Production 03.00)
- Updated the translation strings.
- Updated the Marvell (NIC 1) PXE option ROM from v2.05(20040607) to 3.02(20040811).
- Updated AMI TAG CORE0138, and CORE0139 for the Least Feature Boot Processor eModule.
- Updated Rolling BIOS to Beta7 from Beta5. The exception is feature RBF0015, 
  "Operate WDT only during a bios update". The system did not reset after a 
  WDT timeout period, unless it was the first reset following a flash update.
- Updated DOSCMOS from DOSCMOS_00_00_02 to DOSCMOS_00_00_04.
  This fixes an issue that was preventing the SYSCFG utility from being able to
  copy the CMOS configuration from one system to another.  Previously, the CMOS
  configuration could only be restored on the specific system it was saved on.
- Updated the Intel(R) 82541PI (NIC 2) option ROM from 1.2.19 to 1.2.26.
- Updated AMI TAG CORE0133.
- Modified the MCH workaround for Revision C4.(Remove BIOS force routing IRQ7 for INTA-D)
- Updated PCIE CORE Module from 8.00.10_PCIE_02 to 8.00.10_PCIE_07.
- Modified PCIE error handling service to support error detection on all root 
  Ports.
- Corrected an issue where the BIOS failed to honor memory requests from the PTC 2-port PCIe Switch - The internal PCIe switch/bridge interfaces request 1MB of memory via the optional base address registers, but those resources were not being allocated.
- Update AMI TAG CPUP40052.
- Update AMI TAG CPUP40053.
- Update AMI TAG CPUP40054.
- Update AMI TAG BUG3371.
- Update AMI TAG BUG3078.1.
- Update AMI TAG CORE0146.
- Update AMI TAG CORE0133.1.
- Update AMI TAG BUG2736.
- Update AMI TAG CORE0141.
- Update AMI TAG CPUP40028.1
- Modified Function 'ai15_fne801' to report correct memory size above 16MB.
- Corrected the error message displayed if CMOS is cleared by mBMC.
- Corrected an issue with several third party cards where the adapters didnt get their BAR set properly.
- Update AMI TAG CPUP40052.01.
- Corrected several timing and display mode issues.
- Corrected the CPU SpeedStep display string to (TM) from tm.
- Update CPU module from 8.00.00_CPU-P4_3C.07 to 8.00.00_CPU-P4_3C.08.
- Update AMI TAG BUG3078.

Build 018: P02
- Banner rolled from RC01.02 to P.02

Build 017: RC01.02 (Release Candidate phase for Production (P02)

- Revised a slot population error message.
- Updated CPU Microcode for Intel(R) Xeon(TM) Processor E-0 Stepping (Revision 09).
- Updated CPU Module to 8.00.00_CPU-P4_3C.07 from 8.00.00_CPU-P4_3C.06.
- Corrected an APIC ID in the IOAPIC redirection table.
- Corrected an issue where BIOS did not report the correct information to SMBIOS 
Type4 when the BIOS had changed LFP to BSP.
- Updated the rolling BIOS module.
- Added a fix for the recovery behavior, the system should halt after recovery.
- Added a feature where the "Send chassis reset command" is sent to the mBMC 
when a warm reset is performed.
- Added a feature where an error message (Error code: 0146h) is displayed during
POST when no shadow space for an option ROM is available.
- Added a feature where the INT13 function 8 always returns maximum cylinders - 1.

Build 016: P01
- Banner rolled from RC01.01 to P.01

Build 015: RC01.01 (Release Candidate phase for Production (P01)
- Updated Marvell PXE option ROM from v2.03(20040506) to v2.05(20040607).
- Updated CPU Microcode for Intel(R) Xeon(TM) Processor D-0, B-1 and E-0 Steppings.
- Updated the translated strings.
- Added fix for a USB flash drive where it did not work in bootblock.
- Added a new USB CD/DVD recovery feature.
- Added No-Execute (NX) Memory Protection Technology to BIOS Setup Option.
- Changed the BIOS Recovery behavior from reset to halt, when the BIOS Recovery 
is complete.
- Changed the Memory Reference Code to beep on all memory errors that cause 
the system to halt without video.
- Integrated LH_Error_reporting_rev022.

=============================================================================
                                ISSUES FIXED
=============================================================================
Build 035: P.06
-N/A

Build 034: RC02.06
-Corrected an issue LAN console device ID not match

Build 033: RC01.06
-Corrected an issue USB keyboard works abnormal after INT19 when port 60/64 emulation 
 is enabled in BIOS setup.
-Corrected an issue Console redirection can not work when onboard VGA is disabled in 
 BIOS setup.
-Corrected an issue CPUID display as "F4:" in SETUP with Irwindale R0 F4Ah stepping
 processor.
-Corrected an issue the CPU brand string in POST screen and setup screen has been displayed incorrectly if some combination of processors are mixed.
-Corrected an issue the screen will Hang under BIOS when using AAR 1420SA to make RAID function.
-Corrected an issue that SMBIOS Type 16 is not correct.  
-Corrected an issue that SMBIOS Type 0 is not correct.

Build 032: P.05.10
-Roll back the SSID change in RC01.05 to avoid OS booting issue.

Build 031: P.05
-N/A

Build 030: RC01.05
-Corrected an issue when sparing occurs in single channel mode,the memory faulty LED doesn't be lit.
-Corrected an issue with the DIMM status error in Memory Cinfiguration of Setup Menu when sparing enable in single channel mode.
-Corrected an issue where SSIDs not set correctly on RAID skus.
-Corrected an issue where BIOS logo status windows not displaying with custom logo.
-Corrected an issue "Cert-WHQL-HCT12.1.01 Unreported Memory Test Fails".
-Corrected an issue "nVidia PCIexpress video cards put black bars on BIOS splash screen on BIOS P.02".

Build 029: P.04
-N/A

Build 028: RC03.04
-N/A

Build 005[SE7320VP2(DDR2)]: B01
-Added two Low Profile riser configurations to allow the user to disable the add-in card Option ROM in a 2U configuration.
-Corrected an issue with the AMI Core fix CORE0005 in INT19.ASM.

Build 004[SE7320VP2(DDR2)]: BC01
-Corrected an issue with SMBIOS Type 17,20 when using double rank DDR2 memory.
-Corrected an issue when memory DIMM size exceed 4096 MB, the SMBIOS type 20 would show the size is "0".
-Corrected a PCI parity error injection failure.
-Corrected an issue where the incorrect information was in SMBIOS type 00,08,16.  
-Corrected an issue where an add-in card Option ROM could not be disabled while installed in the Low Profile riser card.


Build 003[SE7320VP2(DDR2)]: A01
-Corrected an issue with the BIOS SETUP menu where the memory configuration was not being displayed correctly. 

Build 002[SE7320VP2(DDR2)]: AC01
-Disable an unused DIMM clock.

Build 001[SE7320VP2(DDR2)]: X01 
- Initial released.

Build 024: P.03 (Production 03.00)
- N/A

Build 023: RC05.03 (Release Candidate phase for Production 03.00)
- Corrected an issue where the system would hang with specific USB Hard Drives at POST.
- Corrected an issue where the MMIO64 module reported memory size incorrectly.
- Corrected an issue where the BMC timestamp was out of sync with BIOS by one day in 2005.
- Corrected a Marvell DOS Diagnostics utility hang issue.

Build 022: RC04.03 (Release Candidate phase for Production 03.00)
- Corrected an issue where the 'userBeforeOptionRomInit' was not executed before the option ROM initializing.
- Corrected an issue where if the P-BIOS checksum is bad, it will force to recovery but not toggle to the S-BIOS.
- Corrected a SDNIT and ACFGXREF test ESCD miscompare failure.
- Corrected an issue where a USB flash drive over 1GB is not accessible in DOS.
- Corrected an issue where if a system is powered on with a USB card reader which contains a brand new memory card, the system hangs with a blinking cursor.
- Corrected an issue where the sense code from a USB mass storage device is not processed properly.
- Corrected an issue where an NVRAM "Update Failed" message appears even when NVRAM is not used.
- Added an "HT Technology in MPS" option into CPU BIOS Setup menu.
  This change adds Setup control of secondary threads in the MPS table.
  This option is disabled by default, and there is an external control 
  function that will gray it out if the Hyper-Threading Technology?BIOS Setup
  option is disabled. Also it will only be available and visible, if the 
  processor itself supports Hyper-Threading Technology?
- Corrected an issue where the BH register is disrupted in USB int13h function call 15h and 16h.
- Corrected an issue where an attached third party USB CD-RW with an empty CD-RW disk causes the system to hang during BIOS POST.
- Added a fix to clear the user password when clearing the admin password.  

Build 021: RC03.03 (Release Candidate phase for Production 03.00)
- Corrected an issue where an Option ROM could not be disabled if the ROM existed on the bridge of a third party add-in card.
- Corrected a BIOS Setup wording issue in the Low Profile Riser (CMOS Setup->Advanced->PCI Config).
- Corrected 3 DIMM configuration support for Users.

Build 020: RC02.03 (Release Candidate phase for Production 03.00)
- Corrected an issue where the DIMM fault LED would not be lit when a memory ECC error was detected during the Operating System phase.
- Corrected an issue where when BIOS promoted AP to BSP (by ILFBP module) it would fill an empty string to the CPU version field of SMBIOS TYPE4.
- Corrected an issue where a third party PIC-E card was not initializing properly.
- Corrected an issue with the Incorrect Processor Speed in SETUP, POST, SMBIOS and Windows.
- Corrected a no boot?issue with the Intel SRCU42X RAID card.
- Corrected an issue where there was no video during BIOS post when a specific third party add-in card was installed in the system. 

Build 019: RC01.03 (Release Candidate phase for Production 03.00)
- Corrected an EFI issue where the IDE CD-ROM could not be mapped.
- Corrected an issue where the reset from the EFI Shell would cause a power-cycle.
- Corrected an issue where the BIOS would detect a USB floppy drive as the "B" drive when no legacy floppy existed.
- Corrected an issue where the POST Code LEDs stayed on after booting to the Operating System, the LEDs should be off.
- Removed PIA as option in F2 BIOS Setup when no Intel Management Module is installed.
- Corrected a parity error injection failure. 
- Corrected an issue where SERRs and PERRs would occur while running a specific stress test suite.  

Build 018: P02

- Banner Change Only.

Build 017: RC01.02 (Release Candidate phase for Production (P02)

- Corrected an "EFI INT 0000006F, Unknown Interrupt ---Halt" error message 
that occurred when entering EFI mode.
- Corrected an issue where the proper register setting was not getting loaded,
this corrected Processor IERR's observed during PCI-E stress testing.
- Corrected an issue where the Front Panel Temperature sensor value was not 
getting loaded into the Heceta correctly for Fan control.
- Corrected SATA issue where a "System Boot Failure" occurred.
- Corrected BIOS wording error in the Low Profile Riser section in BIOS Setup.

Build 016: P01

- Banner Change Only.

Build 015: RC01.01 (Release Candidate phase for Production (P01)

- Fixed issue where some boot devices would disappear at the "Boot Device 
Priority" option in BIOS Setup, when the boot devices number is over 20.
- Fixed issue where the EFI Shutdown function failed.
- Fixed issue where the BIOS could not recover from USB devices.
- Fixed issue where Windows 2003 could not install with third party SATA RAID
card.
- Fixed issue where Windows 2000 could not install with third party SATA RAID
card.
- Fixed issue where the OEM logo disappeared when "Quiet Boot" was enabled.
- Implemented Beep Codes for all Memory error situations.
- Fixed issue where the OEM logo screen "Hit F2" Message could not be 
disabled by setup.

=============================================================================
                              REFERENCE MATERIAL
=============================================================================
Intel(R) Server Platform SE7320VP2 Technical Product Specification (TPS) 

Technical Support: http://support.intel.com

[END OF RELEASE NOTES]