=============================================================================
Intel(r) Server Platforms SE7320SP2 / SE7525GP2 BIOS RELEASE NOTES
=============================================================================
INTEL Enterprise Platform & Services Marketing
Intel Corporation
2111 N.E. 25th Avenue, Hillsboro, OR 97124 USA
=============================================================================
DATE: 		Sep. 21, 2005
TO:		Intel server platform SE7320SP2 / SE7525GP2 customers
SUBJECT:	BIOS Release Notes: P.09 (build 039)
=============================================================================
Information in this document is provided in connection with Intel products. 
No license, express or implied, by estoppel or otherwise, to any intellectual 
property rights is granted by this document. Except as provided in Intel's 
Terms and Conditions of Sale for such products, Intel assumes no liability 
whatsoever, and Intel disclaims any express or implied warranty, relating to 
sale and/or use of Intel products including liability or warranties relating 
to fitness for a particular purpose, merchantability, or infringement of any 
patent, copyright or other intellectual property right. Intel Corporation may 
have patents or pending patent applications, trademarks, copyrights, or other 
intellectual property rights that relate to the presented subject matter. The 
furnishing of documents and other materials and information does not provide 
any license, express or implied, by estoppel or otherwise, to any such 
patents, trademarks, copyrights, or other intellectual property rights.  
Intel products are not intended for use in medical, life saving, or life 
sustaining applications. Intel may make changes to specifications and product 
descriptions at any time, without notice.

Intel is a registered trademark of Intel Corporation. 

*Other names and brands are the property of their respective owners.

Copyright (c) 2004 Intel Corporation.

=============================================================================
                              ABOUT THIS RELEASE
=============================================================================
Build #		: 039
Build Stamp	: SE7320SP20.86B.P.09.00.0039.092120051351
		  SE7525GP20.86B.P.09.00.0039.092120051351
		  
Build Date	: 21 Sep. 2005

=============================================================================
                           BIOS COMPONENTS/CONTENTS
=============================================================================
Processor stepping(s) supported: Intel(R) Xeon(TM) Processors MP

Microcode update versions:
Name                	 Description                           		Stepping(s)
-------------      	 ------------------------------        		-------------------
M1DF3417.TXT	 	Assembly format, Revision 17			D-0 (stepping CPU)
MBDF4117.TXT	 	Assembly format, Revision 17			E-0 (stepping CPU)
M9DF4305.TXT		Assembly format, Revision 05			N-0 (stepping CPU) 
M5DF4A02.TXT		Assembly format, Revision 02			R-0 (stepping CPU) 

System hardware configurations supported: SE7320SP2/SE7525GP2 revision FAB5/6

=============================================================================
                       SYSTEM FIRMWARE REQUIREMENTS/REVISIONS
=============================================================================
BIOS Update Utility
AMI AFU	: 1.33
BMC FW	: mBMC FW 2.31 or later
BMC CFG	: 1.20 or later
FRU/SDR	: FRUSDR 1.30 or higher

On-Board Component option ROM Versions:
ICHR SATA RAID    : 5.3.07061155I
NIC 82541GI	  : v1.2.22
ATI Rage XL VGA   : GR-xlamis3y.330-4.333

=============================================================================
             SYSTEM FIRMWARE REVISIONS TESTED AT TIME OF RELEASE
=============================================================================
- PC87431M mini-Baseboard Management Controller (mBMC): FW Revision 2.40
- SE7320SP20/SE7525GP20 FRU/SDR package: Revision 1.30

=============================================================================
                           IMPORTANT INSTALLATION NOTES
=============================================================================
IMPORTANT NOTES:


1.	There are 2 methods to flash BIOS.
	1.1 Method 1:
	(1) Copy all of the following files into the same folder in Hard Drive
	    or bootable USB Disk Key :
	    BIO\1.bat
	    BIO\AFUDOS.exe
	    BIO\P09.rom

	(2) Go to this folder to run 1.bat and update finishes automatically.	
	
	The update will show seven progress status as follows:

	Reading file .......... done
	Erasing flash ......... done
	Writing flash ......... done
	Verifying flash ....... done
	Erasing BootBlock ..... done
	Writing BootBlock ..... done
	Verifying BootBlock ... done

	1.2 Method 2:
	(1) Go to BIN folder and execute P09.EXE to make bootable floppy.
	(2) Use this bootable floppy to boot and update finishes automatically.	
	

2.	After system boots, enter BIOS Setup if you want to change any options.


*****************************************
*** USB-Disk Recovery Feature Details ***
*****************************************
- Build Recovery Storage
  1.    Plug in the USB DISK_ON_KEY
  2.    Boot the system to DOS on a bootable floppy
  3.    Then from the floppy, format the USB DISK_ON_KEY to FAT 12 or FAT 16
  4.    Rename ROM file to AMIBOOT.ROM and copy it to USB DISK_ON_KEY.

- Execute BIOS Recovery
  1.    User Forced Recovery
        - set Recovery Boot Jumper J17 (10-11)
        - Insert the Recovery storage into USB port.
        - Power on system
        - System boot and the debug port will display the flash progress.
        - When flash complete, power off system and set jumper back to Normal
          mode J17 (9-10)

  2.	Auto Recovery
        - If system ROM is damaged (checksum BAD), system will perform BIOS
          recovery automatically.

**NOTE** : The recovery only supports the storages of both type FAT12 & FAT16.

**********************************************
*** Multi-Disk Recovery Feature Details ***
**********************************************
With this new feature the System Recovery can be made from Multiple Floppy
Disks to support ROM image greater than 1MB. 

- Build Recovery Storage
  1.	Use the Split.exe file to split the ROM image.
	- Use the following command syntax at the command prompt
	- split <File Name To Be Split>  <New File Name>  <File Size in KB>

	- For Example
	- C:\split AMIBOOT.ROM AMIBOOT 1024

  2.	The above command will create the Files of sizes 1MB each (1024KB) 
  	with names AMIBOOT.000, AMIBOOT.001K and so on depending upon the
  	AMIBOOT.ROM file size.

- Execute BIOS Recovery
  1.    User Forced Recovery
        - set Recovery Boot Jumper J17 (10-11)
        - Load the first Disk AMIBOOT.000 in floppy
        - Power on system
        - System boot and the debug port will display the flash progress.
        - Load AMIBOOT.00x finish. System beep......
        - Replce the next disk AMIBOOT.00x in floppy
        - When flash complete, power off system and set jumper back to Normal
          mode J17 (9-10)

  2. 	Auto Recovery
        - If system ROM is damaged (checksum BAD), system will perform BIOS
          recovery automatically.

- Multi-Disk Recovery Beep Code List:
  This uses the standard beep codes used by AMI Core8 for Recovery with some
  additional codes. They areK (each beep is 1sec long with 0.5sec gap)
  1 long beep	Insert for AMIBOOT.001 File
  2 long beeps	Insert for AMIBOOT.002 File
  3 long beeps	Insert for AMIBOOT.003 File
  KKKKKKKKKKKKK.

- Multi-Disk Recovery limitations:
  Maximum Files supported 1000 files (AMIBOOT.000 to AMIBOOT.999)

***********************************************
***  AMI AFUDOS Flash Feature Details  ***
***********************************************
- AFUDOS.EXE V1.33
- This update processing takes 3 to 4 minutes.  Never turn off the system 
  during the update processing. The following message appears when the update 
  processing is finished:

	Reading file ........ done
	Erasing flash ....... done
	Writing flash ....... done
	Verifying flash ..... done
	Erasing BootBlock ... done
	Writing BootBlock ... done
	Verifying BootBlock.. done

  If the system does not restart, TURN THE POWER OFF, THEN ON.

AMI Firmware Update Utility - Version 1.33
Copyright (C)2004 American Megatrends, Inc.  All rights reserved.

	afudos /i<ROM filename> [/o<save ROM filename>] [/n] [/p[b][n][c]]
	[/r<registry_path>] [/s] [/k[N]] [/q] [/h]

	/n    - don't check ROM ID
	/pbnc -
		b - Program Boot Block
		n - Program NVRAM
		c - Destroy System CMOS
	/r    - registry path to store result of operation (Windows version)
	/k    - Program all non-critical block only
	/kN   - Program N'th non-critical block only (from k0/k1/k3 upto k7)
	/c    - Skip non-critical blocks
	/s    - Leave signature in BIOS
	/q    - Silent execution
	/h    - print help
	/t    - Display ROM ID string
        /c    - Program Main BIOS and all Non-critical blocks
        /cN   - Program Main BIOS and N'th Non-critical block (from c0 upto c7)
        /d    - Compare ROM file (skips flashing)
        /u<filename>	-Display ROM ID

=============================================================================
                            KNOWN ISSUES/WORKAROUNDS
=============================================================================
- When running the Flash Utilities (AFUDOS, AFUWIN etc ) do not use the
  following options

	/pn   - for flashing NVRAM Block
	/k    - for flashing all Non-Critical Blocks only
	/c    - for flashing all Non-Critical Blocks along with main BIOS image
	/k0   - for flashing the Non-Critical Block 0 only
	/c0   - for flashing the Non-Critical Block 0 along with main BIOS
	        image

  Since the above options try to flash protected areas NVRAM or Non-Critical
  Block 0 the verification fails.

  Always use the following command to flash a bios

	C:\afudos /iXXXX.ROM /pb /c1 /c2

	/i    - Input .ROM file
	/pb   - Flash Boot Block
	/c1   - Flash Non-Critical Block 1 (OEM Logo & User Binaries) along
	        with Main BIOS Image
	/c2   - Flash Non-Critical Block 2 (CPU MicroCode) along with Main BIOS
	        Image

- If user update to Rolling BIOS image (Build 009: A02 or after) then it can't
  flash back to non Rolling BIOS image (Build 008: A01 or before).

- If user would like to update BIOS from non Rolling BIOS image (Build 008: A01
  or before), please use BIOS version 2B00 (Build 010: BC01) and type '1' to
  flash BIOS.

- BIOS version BC02 or below does not support MCH C-0 stepping.

- BIOS version BC04 or below does not support IA-32e enabled CPU.

- BIOS version RC01 or above does not support MCH B-0 or before.

- The recovery mode support FAT12 and FAT16 only.

- SP & GP do not allow flash utility to update NVRAM.

- The BIOS setup item "Maximum CPUID Value Limit" must be enabled for
  installing some legacy OSes (NT4.0 for example) which do not support it.

- If user updates BIOS to RC02 (Build: 25)  then it may not flash back to P04
  (Build :24 or before).

- If user want updates BIOS to P05 (Build: 28) from RC02 (Build: 25 or before).
  Please flash BIOS twice to make sure both banks' BIOS are the same. 
  Cause by the Rolling BIOS procedure changed.

- If user want to downgrade BIOS from P05 to P04. There have two Methods as 
  following.
Method A 
1. Power off system
2. Change the Rolling BIOS jumper J29 to 2-3 (force BIOS to lower bank)
3. Power on system
4. Flash BIOS P04
5. Reboot system
(This will cause the 0xFFC00000 ~ 0xFFDFFFFF equal to 0xFFE00000 ~ 0xFFFFFFFF 
 and they are always the lower bank of flash ROM.)

Method B (If user flash P04 but system is always P05)
1. Flash BIOS P05 again
2. Reboot system
3. Flash BIOS P04
4. Reboot system
(This will change the P05 BIOS from lower bank to upper bank of flash ROM and 
 be successful to update BIOS to P04.)  

=============================================================================
                              FEATURES ADDED
=============================================================================
Build 039: P.09
- Remove stepping G-1 Processor Microcode.

Build 038: RC01_09
- Update D-0 stepping microcode to Revision 17, Update E-0 stepping microcode to 
  Revision 17, and Update N-0 stepping microcode to Revision 05.
- Add G-1 stepping microcode Revision 3, and R-0 stepping microcode Revision 2.
- Update AMI TAG CORE0195(Date: Tue 05-03-2005)
- Latest Mixed Processor Stepping Changes.
- Least Featured BSP Changes.
- Implement WOL from S5 option in BIOS setup.
- MAX Payload size of PCI-E transactions and Read Request Size from 128 to 256.
- Update USB module to 8.00.04_USB-2.24.00-Beta5.
- Update AMI TAG USB0089.3, USB0100, USB0107, USB0109, USB0111, USB0112.
- PCI express error reporting SERR setting.
- Set the region F0000 as memory-mapped and un-cacheable.
- Set the Echo TPR Disable bit (CPU MSR 1A0h bit 23) for R-0 processors.
- Follows Lindenhurst_BSU_v1_07.pdf clarification #1 for recommended register 
  settings.

Build 037: P.08
- Rebuild BIOS P.08 based on RC02.08

Build 036: RC02_08
- Add new options on the PCI Configuration Sub-menu to force PCI devices to 32 
  or 64bits and control the hightest PCI memory address.
- Fix GV3/DBS function can not work when Hyper-Threading is disbaled.
- Fix Power Button wakeup from S1 fail when IST enabled.
- Add POST error message when LV Noccna processor mixed stepping changes.
- Follow AMIBIOS CORE 8.00.11 to update Kernel code AMI TAG CORE0192.

Build 035: RC01_08
- Shaded 'Clear User Password' if user password is not installed.
  Shaded 'Set User Password' if Administrator Password is not installed.
  If Administrator password is cleared then User password is also cleared.
- Display the Hardware Prefetcher (Q_HW_Prefetcher) and Adjacent Cache Line 
  Prefetch (Q_ACL_Prefetch) to CPU menu.
- Bug Fixed for that BMC timestamp synced by BIOS being off by one day issue 
  seen with 2005 date.
- Enable the TM2 for 3.6 GHz stepping and N0 stepping Processors with FSB 800MHz 
  and procesor signature >= F40h.
- Update the ISM module to ISM_00_01_04 from ISM_00_01_03.
- Fix the system keeps rebooting without video when installed with Mixed 
  Processors.
- Udpate AMI TAG CPU40062 to improved 4G above memory issue.
- Update AMI TAG CORE0155, CORE0155.1, CPUP40059, CPUP40018.03, CORE0135, 
  USB0095, USB0046.1, CORE0170, USB0032.1, USB0090.1, CORE0174, USB0097, 
  USB0089.1, USB0098, USB0094.1, CORE0180, IDE0030, 
- Bug fix the NMI malfunctioning.
- CCB item #282 (Remove Event #0x83 from mBMC SEL) implemented.
- CCB item #290 F2 Setup Option requested to automatically clear mBMC SEL when 
  full.
- Prevent the PCI_INFO from overlapping.
- Do not log the Memory Buffer error because it is non-fatal error.
- Update E-0 stepping microcode to Revision 12 from Revision D.
- Update multi-language strings.
- Adding logic "if reserve VPD also FFh, don't bother updating main".
- Bug fixed for SMBIOS Type0 BIOS Characteristics.
- Fix the ystem hangs in various locations during POST when PTC card test is 
  running for test 13, 1.1, 1.2, 3.x.
- Bug fixed memory end address in SMBIOS type17 are incorrect.
- Bug fixed: Unix floppy boot issue from Kraftway.

Build 034: P.07
- Rebuild BIOS P07 based on RC01.07

Build 033: RC01.07
- Update AMI Core label CORE0040/CORE0041/CORE0042.x for CMOS checksum issue.
- Update AMI label CPU40056 for ILFBP module issue.
- Update AMI TAG CPUP40057 (Tus 12/13/04)
- Follow AMIBIOS CORE 8.00.11 to update Kernel code.
- Update the ISM module to ISM_00_01_03
- Update CPU microcode for D0/E0 stepping & N0 stepping
- Update Rolling BIOS to Beta8 from Beta7.
- Intel's formal recommendation for enabling LRU be that we clear all bits 13:0
  in R4Ch in Device8
- Upgrade the IST module to 8.00.10_IST_09A from 8.00.10_IST_09.
- Implement Lindenhurst BSU v1.02 erratta #30: PCI EXpress x16 Graphics cards 
  hang during system boot.
- Implement Lindenhurst_BSU_v1_02 erratta#32. Memory Reference Code not 
  recognizing Address/Command Parity capable ECC DIMMs
- Fixed the Retaining configured boot order adding new device at end.
- Fixed the 'userBeforeOptionRomInit' is not executed before option ROM 
  initializing.
- Fixed that if the P-BIOS checksum is bad, it will force to recovery but not 
  toggle to the S-BIOS.
- Fixed the NVRAM "Update Failed" message appears even when NVRAM is not used.
- Fixed the USB 1G flash drive issue.
- Bug fixes (ref. ISSUES FIXED section)

Build 031: P.06
- Rebuild BIOS P06 base on RC02.06
- Remove M9DF4303 (N0 stepping) microcode patch in P06 BIOS

Build 030: RC02.06
- Bug fixes (ref. ISSUES FIXED section)

Build 029: RC01.06
- Update AMI TAG CORE0138 / CORE0139 (09-10-2004)
- Fixed the system sometimes will hang After execute STI instruction in 
  procedure imtProtectedModeEntryPoint.
- Modify PCIE error handling service to support error detection on all root 
  ports.
- Follow AMIBIOS CORE 8.00.11 to update Kernel code.
- Fixed the CMOS clear function by mBMC displaying wrong POST message issue.
- Update Rolling BIOS to Beta7 from Beta5.
- Update DOSCMOS eModule to DOSCMOS_00_00_04.
- Fixed some exact timing and display mode issue in Console Redirection mode.
- Fixed the CPU SpeedStep display string to (TM) from tm.
- Update CPU module from 8.00.00_CPU-P4_3C.07 to 8.00.00_CPU-P4_3C.08.

Build 028: P05
- Rebuild BIOS P05 base on RC04

Build 027: RC04
- Bug fixes (ref. ISSUES FIXED section)
      
Build 026: RC03
- Bug fixes (ref. ISSUES FIXED section)

Build 025: RC02
- Support AMI DMI edit tool (v2.00.33) to change SMBIOS Type11 (OEM String) 
  information.
- Update EFI WW14, WW22 and WW30 drops.
- Changed the 'Quiet Boot' default setting from 'Disabled' to 'Enabled'.
- Update the SiI3124 Optrom to 6017 from 6015.
- Update the Hance Rapids Optrom to 5.3.07061155 from 5.3.04191453.
- Upddate onboard NIC 82541GI optrom to 1.2.22 from 1.2.19.
- Use PCI SERR to log PCI-E Uncorretable ERROR.
- Follow the SP EPS v1.01 to implement FSB/Hublink/MBUF SEL.
- Update the Lindenhurst memory reference code to v1.04 from v1.03.
- Update CPU module to 8.00.00_CPU-P4_3C.07 from 8.00.00_CPU-P4_3C.02.
- Update IST ICH to 8.00.10_IST_09A from 8.00.10_IST_09.
- Implement the latest drop(ASD_07072004) of multi-language.
- Implement the ACPI MCFG table for PCI Express.
- Integrated LH_Error_reporting_rev023.
- Add No-Execute (NX) Memory Protection Technology to BIOS Setup Option and
  default setting is disabled.
- Follow SP EPS v1.01 to change the BIOS Recovery behavior from reset to halt 
  when BIOS Recovery is completed.
- Send chassis reset command to mBMC to perform warm reset.
- Integrated Rolling BIOS Beta4 and Rolling BIOS watchdog will stop at
  checkpoint 0x03.
- Enhanced Halt State (C1E) is enabled if pcocessor supports this feature.
- Support recovery from USB CDROM and USB floppy.
- Do not force PIRQA-D routing to IRQ7 if the MCH stepping is C4 stepping.

Build 024: P04
- Follow Lindenhurst_BSU_v0_82.pdf to fix MCH IRQ Hang issue.
- Redirect SATA IRQ handler entry point from F000h block to E000h.It can solve
  SATA IRQ7 issue.
- Since SP/GP use IRQ9 as SCI, removed SCI IRQ (IRQ9) from PIRQ(G).
- Display MCH stepping in SETUP under Main Menu Options page.

Build 023: P03
- N/A

Build 022: P02
- Removed the Linderhurst string from POST diagnostic screen.

Build 021: P01
- Removed the evaluation string from POST diagnostic screen.
- Hide the 'Preproduction Debug' BIOS setup menu.
- Fixed the incorrect string in the 'Processor Configuration' setup menu.
- Fixed the incorrect string when all DIMMs mark as failed.

Build 020: RC01
- Update the Memory Reference Code to v1.03 from v1.02.
- Update Intel security to IntelSecurity_00_00_17 from IntelSecurity_00_00_14.
- Update the Intel Server management to ISM_00_00_97 from ISM_00_00_94.
- Use secondary non-critical block #2 for INT15 D042h to update CPU microcode.
- Update IST to 8.00.10_IST_09 from 8.00.10_IST_08A.
- Update MPS-Table eModule to 8.00.09_MPSTable_11 from 8.00.09_MPSTable_06.
- Update the onboard NIC 82541GI option ROM to v1.2.19 from v1.2.17.
- Indegrated EFI eModule EFILH041704 and EFILH050604.
- Prevent UUID lost when 1st build in manufacture and battery lost.
- Allow using PnP function to update SMBIOS type 11.
- Move the USB data area to E000h segment because MCH stepping C0 or above
  had fixed 'MCH master aborts inbound accesses between 640KB and 1MB'.
- Update the TControl value offset to 47 from 50 degrees Celsius.  

Build 019: B02
- Follow SP EPS v0.94 to modify the Error Code, Message and Attribute for BIOS
  POST error message.
- Update Hance Rapids SATA RAID option ROM to 5.3.04191453 from 5.2.02201602.
- Allow ASL code to send debug code to 80port.
- Do not disable MBE when SBE 10 times within 1 hour.
- Follow Intel's recommendation to implement the workaround for 'ICH5/ICH5R and
  Hance Rapids USB Eye Diagram Issue'.
- Updated CPU module 8.00.00_CPU-P4_3C.02 from 8.00.00_CPU-P4_3C.01.
- Update the Memory Reference Code to v1.02 from v1.00.
- Implement the BSU v0.78.
- Implement the Spare DIMM failover usage model and follow the BSU v0.78
  to implement the SPARECTL SEC prescale value/unit and threshold.
- Implement the multi-language but it is not completed.
- Removed Compatibility Mode for PCI Express 1.0 and 1.0a Link Training for MCH
  C1 stepping or above.

Build 018: B01
- Updated Lindenhurst Memory Reference Code to v1.00 from v0.86.
- Updated CPU module 8.00.00_CPU-P4_3C.01 from 8.00.00_CPU-P4_3C.00.
- Support MMIO64 feature to allocate PCI resource above 4GB.
- Follow Sun Prairie EPS v0.94 to implement setup menu.
- Implement Lindenhurst, Lindenhurst-VS, Tumwater MCH BIOS Specification
  Update v0.77.
- Changed CMOS date behavior to "System date will be set to build date if CMOS
  power loss or invalid date/time." from "System date will be set to build date
  whenever CMOS is bad.".
- Update SETUP.BIN to v2.56 from v2.53 to support MenuItem shaded function!
- Don't execute PCI-E Jitter tolerance algorithm if MCH is C1 stepping.
- Updated Rolling BIOS module to Beta3 from Beta2 and reserved the Non-Critical
  Block2 for CPU uCode update from INT15 with AX=0xD042, BL=0x01.
- Use Critical Interrupt with Bus Correctable Error event to implement PCI
  Express error. (Event Data2 = Bus number, Event Date3 = Dev/Fun) before
  Intel finialized the PCI-E event log format.
- Do not log SBE event.

Build 017: BC08
- Update IST to 8.00.10_IST_08A from 8.00.10_IST_08
- Changed the NVRAM to Secondary BIOS from primary BIOS.
- Implement the IBIOSI ID identifying for Rolling BIOS.
- Rolling BIOS watchdog timer will start on each booting.
- Support baudrate of 38.4K for Serial Console redirection.
- Show individual DIMM instead of Device Set for SMBIOS type17 'Size' field.
- Enabled PCI Express Bridge #2, #3, #4 for MCH C1 stepping.
- Implement 'Port 60/64 Emulation' to USB configuration.
- Follow Intel Setup Spec to modify 'Processor Configuration' Setup sub-menu.
- Follow Intel Spec to modify 'Event Log' Setup sub-menu.
- Follow BSU v0.76 to change MCH D8-DB register to 0B5930000h from 0D5930000h.
- Update Chipset error reporting following INTEL HW DEs guide lines.
- Do not log Single Bit Error event log.
- Raise NMI if Multi-Bit error detecting.
- Support MMIO64 feature.
- Implement FORCEPR# for D0/E0 stepping processor.
- Use BOARD ID instead of SIO3 revision ID to detect FAB5 M/B in bootblock.
  (BC07 use SIO3 A3 stepping to detect FAB5 M/B)

Build 016: BC07
- Integrated Intel Rolling BIOS Drop2 to SP BIOS.
- Make recovery behavior the same as 'AFUDOS /i<filename> /pb /c1'.
- Update the SiI3124 Optrom to 6015 from 6014.
- Turn off the clock if the slot/device is empty.
- Automatic detecting hardware revision FAB5 and changed the behavior of
  Diag LED and DIMM Failed LED.
- Support Zip-250 and Zip-750 in recovery mode.
- Follow Intel spec to modify SMBIOS Type 4/8/9/12/17.
- Follow Intel Spec to modify BIOS Setup Menu.
- Follow Intel Spec to modify FRB-2 & FRB-3 policy.
  (User should use 'ipmitool 84 18 52 11 00 00 20 00 8C F0' to enabled FRB3
  with countdown value = F0h = 240*100 ms = 24 seconds because SDR Package 0.55
  or before does not enabled FRB3.)
- Base on the test result, modify the PHY register of SiI3124.
- Implement Lindenhurst/Lindenhurst-VS/ Tumwater MCH BIOS Spec update v0.75.

Build 015: BC06
- Update the Intel memory reference code to 0.86x from 0.84x.
- Implement the Userflash to support 64KB user binary.
- Implement the Boot Intragrity Services (BIS).
- Implement the DOSCMOS.

Build 014: BC05
- Implement Lindenhurst/Lindenhurst-VS/ Tumwater MCH BIOS Spec update v0.72.
- Support dual monitor.
- Support IA-32e.
- Follow EPG BIOS IBIOSI Specification v0.2 to implement IBIOSI feature.
- Disabled the unused Pin# in the clock generator.

Build 013: BC04
- Implement the memory buffer error log.
- Implement the PCI Express error log.
- Implement Lindenhurst/Lindenhurst-VS/ Tumwater MCH BIOS Spec update v0.71.
- Update EFI module to EFI_00_00_30.
- Implement the BIOS ID to setup menu.
- Removed SMBIOS type 24.

Build 012: BC03
- ATAPI CDROM recovery is supported.
- Update the Memory Reference Code to 0.8x from 0.81.
- Video is not supported during BIOS Recoverys.
- Prevent BIOS Recovery to flash boot block.
- Replace full reset with GPIO reset to prevent system shutdown then power on.
- Update Hance Rapids SATA RAID option rom to 5.2.02201602 from 5.2.02031259.
- Update the SiI3124 SATA option rom 6014 from 6006.
- Follow Lindenhurst/Lindenhurst-VS/ Tumwater MCH BIOS v0.71 to Implement a
  CMOS option for user to change bits 10:7 of D0:F2:R9C-9Fh, from a value
  ranging 4 through 12.
- Implement the BIOS ID to Smbios type 0.
- APM supported.

Build 011: BC02
- Changed the boot block recovery target to secondary bank from primary bank
  and boot block recovery will also program the boot block of secondary bank.
- Implement Hance Rapids Southbridge PCI Mode Performance Settings WhitePaper
  v1.5.
- Modify Hance Rapid B0:D1E:F0 Register 50h, bit 13 to 1 to prevent LAN from
  disconnecting.
- Follow BIOS EPS v0.7 to implement IDE setup modification.
- Removed Processor Retest Setup Question because mBMC does not supported.
- Implement a way to disable this workaround via a CMOS setup option
  Disable PCI Expres jitter tolerance.
- Changed the Rance Rapids option rom to 5.2.02031259 from 5.2.12161343.
  This OPROM avoid using 640KB ~ 1MB memory range for read/write DMA command.
- Changed the DIMM falied LED for hardware revision FAB4.
- Display the setup option to select PCI Express v1.0 compliant for MCH B0
  stepping only.
- Follow mBMC EPS v0.9 to modify the PEF filter number of FP NMI button to #7
  from #9.
- Implement POST_STATUS signal goes high to let the RMC card to know that BIOS
  is finished with its processes and the RMC is clear to begin its processes.
- Enabled FAN channel 0/2/3/4 in SIO3 for mBMC to monitor the FAN status.

Build 010: BC01
- Disable the Dynamic Bus Inversion for A-Step MCH silicon and enable the
  Dynamic Bus Inversion for Non A-Step MCH silicon.
- Update SEL_XOR ( BIOS_SEL XOR) selected code in hook:ProcessRBModule_FAR.
  Because switching  SEL_XOR should be performed on RAM instead of ROM. 

Build 009: A02
- BIOS setup option for user to configure individual PCI Express ports in the
  MCH to behave as PCI Express v1.0 compliant since Lindenhurst MCH B0 silicon
  are PCI Express v1.0a compliant.
- Update the CUSTCMOS from CUSTCMOS_00_00_13 to CUSTCMOS_00_00_14 to support
  reading and writing CMOS to GPNV during runtime.
- Update the Intel Server management from ISM_00_00_82 to ISM_00_00_85.
- Updatae the oemINT15 module from OEMINT15_00_00_22 to OEMINT15_00_00_26.
- Prevent the FRB3 to be disabled during bootblock.
- Implement the Board SKU ID and update GPIO/PCI routing for hardware revision
  Fab4.
- Follow Board SKU ID to program Device SSID.
- Update Lindenhurst memory reference code v0.81
- Implement the Rolling BIOS.
- Add Hub Interface & System Bus ERROR Handling Module to hardware engineer to
  debug.
- Implement the recovery function.
- Multi-Disk Recovery Feature supported.
- Update CPU Microcode for C-1 Stepping (M0DF3702.TXT).
- Kill lan stack before PCI optrom initializing.

Build 008: A01
- Support SiI3124 RAID function.
- Enables support for INT15h, Function DA20h, Subfunction 0786h: Write UUID.
- Implement CPU_MCE_Handler_FAR for BIOS INT12h ISR.
- Implement for SMBIOS type 30.
- Update Hance Rapids RAID option rom from 5.2.10281452 to 5.2.12011723.
- Maintain the DIMM failed LED after AC recovery.
- Update LAN console from INTEL to fix track #15421 and #15422.
- Follow the "Hance Rapids Southbridge PCI Mode Performance Settings WhitePaper
  (December 2003)" to implement the PCI-X bridge(B0:D28:F0) performance setting
  for Hance Rapids A3.
- BIOS workaround request for MCH B0 support is regarding #2 in the Lindenhurst
  Sightings Report DDR 266 with an 800 MHz system bus non-functional in current
  MRC (Rev0.8)
- Fix floppy controller disable cause system to hang up when detecting SATA HDD
- Bug fixed pressing <F2> will load CMOS default after resume from S4.
- Add BIOS SETUP items to "Chipset"->"MCH Configuration" menu for MCH B0 PCI-E
  port to choice programing PCI-E 1.0 Compliancy.
- Update the following module from AMI remote source safe.
   (1) Update Hance Rapids eModule (ref. 8.00.10_SB-HRICH_007)
   (2) Update Lindenhurst eModule (ref. 8.00.10_NB-Lindenhurst_05)
   (3) Update PCE-Express eModule (ref. 8.00.10_PCIE_03)
   (4) Update Flash eModule from 8.00.00_FLASH-4MSTD64K_01 to
       8.00.00_FLASH-4MSTD64K_03.
   (5) Update SMIFlash eModule from 8.00.00_SMIFlash-1.00.06 to
       8.00.00_SMIFlash-1.00.07.
   (6) Update CPU eModule from 8.00.00_CPU-P4_3B.7 to 8.00.00_CPU-P4_3B.10.
   (7) Update SMI - Module from 8.00.0_SMI-3.11.03 to 8.00.0_SMI-3.11.06.
   (8) Update the USB module from 8.00.04_USB-2.23.01 to 8.00.04_USB-2.23.02.
   (9) Add Boot Block Vedio eModule 8.00.07_BBVideo-BETA-05_00.

Build 007: AC03
- Implement the Single Norway option rom (v1.2.30 Beta-1).
- Implement workaround for "Booting difficulties may be experienced when using
  certain PCI Express* cards."according to Lindenhurst/Lindenhurst-VS/Tumwater
  MCH BIOS update v0.53.
- Update ISM module from ISM_00_00_80 to ISM_00_00_82 and implement getting
  IP address from DHCP.
- Implement the Hyper Threading enabled/disabled to BIOS setup menu.
- Bug fixed the incorrect device id of PCI-Express slot 4 since the device id
  is "0" instead of "5".
- Bug fixed welcome screen disappeared when installing RH Linux 8.0/9.0.
- Change the BIOS Admin/User password to alphanumreic only.
- Implement the FRB4 for HD/PXE boot.
- Bug fixed the SDR revision in BIOS setup menu.
- Bug fixed stack Corruption when booted to DOS with USB Keyboard & Console
  Redirection Enabled.
- Implement PCI/PCI-X/PCI-Express VGA card as the top priority. 

Build 006: AC02
- Updated the AMI CORE from 8.00.09 to 8.00.10.
- Bug fixed the local keyboard malfunction when console redirection enabled.
- Updated the Lindenhurst memory reference code from 0.75 to 0.80.
- Implemented the Intel Memory Test.
- Prevent the onboard NIC 82541GI 1Gb failed.
- Update the 82541GI option rom from 1.12.16 to 1.12.17.
  Update the SiI3124 option rom from 6003 to 6006.
- Implemented the RAID function for Hance Rapid.

Build 005: AC01
- Bug fixed the garbage message in the console redirection.
- Implemented the Save/Load Custom Defaults to BIOS setup menu.
- Implemented the Intel Diag LED.
- Implemented ECC event log.
- Bug fixed the EFI booting failed.
- Modify the Security in Bios Setup the same as Bios EPS 0.4.
- Implemented the INTEL OEM logo.
- Front Pannel (Power/Reset button) and NMI button Inhibited supported.
- Add CPU FSB 667MHz support.

Build 004: X04
- Bug fixes (ref. ISSUES FIXED section)
- Follow BIOS EPS 0.3 to implement BIOS SetupMenu.
- Update BIOS module SB-HRICH_004 / PCIE_02 / USB2.23.01)
- Update BIOS module ISM_00_00_77 / OEMINT15_00_00_21
- Enable option ROM for Onboard SATA Sil3124
- Update Memory reference code from v.70 to v.75
- Changed the KNI_DIS_N from SIO GPIO62 to GPIO51

Build 003: X03
- Bug fixes (ref. ISSUES FIXED section)
- SMBIOS function implement.
- Serial COM2 function enable.
- Implement PCI ERR handling.
- Enable memory Spread Spectrum

Build 002: X02
- Bug fixes (ref. ISSUES FIXED section)
- Serial Console Redirection ready for BIOS SetupMenu and DOS environment.
- ACPI SPCR feature ready for Windows 2003.

Build 001: X01
- Initial released.

=============================================================================
                                ISSUES FIXED
=============================================================================
Build 039: P.09
- Bug fixed: When MCH stepping more than C2, BIOS can't follow 
  Lindenhurst_BSU_v1_07.pdf clarification #1 for recommended register settings.

Build 038: RC01_09
- Tracker 21665: [X] Flow Control Settings in BIOS P08 Other Than RTS-CTS 
                 Cause Platform Hangs. 
- Tracker 21279: USB mouse not working on Intel RAID cards BIOS Console.
- EP/RP Tracker 21707: [SMBIOS] Type 0 is not correct.
- EP/RP Tracker 21632: [BEL] SMDXREF test is failed.
- Bug fixed: Serial can not work when onboard VGA is disabled.
- Bug Fixed: R-0 stepping processor CPUID display issue in BIOS SETUP.
- Bug Fixed: CPU frequency display different in the POST screen and BIOS setup 
             with two different frequency R0 stepping processors.

Build 037: P.08
-N/A

Build 036: RC02_08
- Tracker 20867 : BIOS not implementing TW errata #22 properly.
- Tracker 20881 : BIOS logo status windows not displaying with custom logo
- Tracker 20204 : [X] nVidia graphics cards do not work on GP2. 
- Tracker 21135 : Cert-WHQL-HCT12.1.01 Unreported Memory Test Fails on SKU3.
- Tracker 20342 : [X] Insufficient Memory to Shadow PCI ROM Message using 
  nVidia QuadroFX3400 PCIE .
- Tracker 20593 : Boot error with P07 BIOS w/ ATI or Nvidia cards & LSI SCSI.

Build 035: RC01_08
- Tracker 19741: 1GB physical memeory unavailable to WS2003 when 4GBs 
  installed.
- Tracker 19641: Sun Prairie/Grand Prairie UUID and CMOS statistics needed.
- Tracker 19556(VP): Marvell Diagnostics hang with VP [MCH C4] 604MBs.
- Tracker 19557(VP): Marvell Diagnostics v6.25 for Dual-Port NIC hangs on VP 
  [C4] w. & w/o On-Brd NIC.
- Tracker 19487 : [X] Can't see HSC FW revision in BIOS.
- Tracker 20429 : No error message for 2 CPUs with different frequency.
- Tracker 17908 : Multiple Event Logs after MBE is generated.
- Tracker 20204 :  [X] nVidia graphics cards do not work on GP2.  

Build 034: P.07
-N/A

Build 033: RC01.07
- Tracker 19334: [X] Support for 3 DIMM configuration? 
- Tracker 19397: [X] Mellanox PIC-E card not initalizing properly.
- Tracker 19450: [X] Cannot boot with Intel SRCU42X RAID card.
- Tracker 19456: There is no display during BIOS post when insert the MegaRAID 
  SCSI 320-2X on GP.
- Tracker 19554: [X] Special "HyperThread MPS" CMOS Token Required to Support 
  FreeBSD.

Build 031: P.06
- N/A

Build 030: RC02.06
- Tracker 19403: Incorrect Processor Speed in SETUP, POST, SMBIOS and Windows  

Build 029: RC01.06
- Tracker 17326: System happened SERR and PERR when run WinPie stress test.  
- Tracker 17575: Parity error injection failure  
- Tracker 18609/19253: [EFI] INT 0000006F, Unknown Interrupt ---Halt  
- Tracker 18732: GP BIOS fails to honor memory request from PTC 2-port PCIe 
  Switch
- Tracker 19238:AMCC 9xxx Adapter doesn't get it's BAR set properly 
- Tracker 19248: [x] BIOS Int 15h issue
- Tracker 19348: [x] "PCI Onboard Unknown Device" displayed during POST
             
Build 028: P05
- N/A

Build 027: RC04
- Tracker 17647: System hanged on stress test running/S4 test  
- Tracker 18978: System issued SERR when inserted Syskonnect SK-9E21D in PCI-E.

Build 026: RC03
- Tracker 18887: SATA drives periodically disappearing during reboots.

Build 025: RC02
- Tracker 16009: It happened blue screen when installed windows 2000 on Adaptec
		 39160.
- Tracker 16215: BIOS setup should support multi-language!
- Tracker 16405: System hanged on installation of Windows 2003 Server
		 Enterprise.
- Tracker 16454: [BC07] Some Setup items are missing in BIOS Setup Menu.
- Tracker 16493: System can't detect Intel-SRCU32U card when inserted in PCI
		 64 bits slot.
- Tracker 16775: [X] Bootstrap Processor for Mixed Processor Steppping is
		 not correct.
- Tracker 16866: Setup utility of Sil3124 was disappeared from time to time.
- Tracker 16986: Symantec Ghost 7.0 is not working properly.
- Tracker 17294: [X] Type7 (Cache Information) of SMBIOS, Offset 05h 
		 (Cache Configuration) is not correct.
- Tracker 17408: Red Water card plugged into X4 slot causes network and USB
		 test to run slow.
- Tracker 17467: USB flash disk recovery boot doesn't work on all USB ports.
- Tracker 17573: [X] 2nd CPU is not recognzed if Hyper Threading is disabled.
- Tracker 17695: USB Hotplug FD displays under CD/DVD Drives.
- Tracker 17824: Sun Prairie BIOS:  Password mismatch errors cannot be cleared.
- Tracker 17888: 3Dlabs PCIe graphics adapter doesn't get its BARs initialized
		 correctly.
- Tracker 17908: Multiple Event Logs after MBE is generated.
- Tracker 17940: Behavior on DBE injection in Non-RAS mode does not match EPS.
- Tracker 17943: Behavior on SBE injection in Non-RAS mode does not match EPS.
- Tracker 17944: "Memory Retest" Option in BIOS setup is not getting disabled
		 after a reboot.
- Tracker 17962: Bus Uncorrectable Error occurred  in the process of
		 WHQL11.2/ACPI stress test.
- Tracker 17990: Important sounding error in SEL does not give enough
		 information to be useful.
- Tracker 18059: RedHat Linux kernel (Kernel : 2.4.21-15.EL) EM64T panic on
		 shutdown.
- Tracker 18500: PCI-E correctable bus errors in slot 4.
- Tracker 18583: [X] Windows enters ! if onboard video is not disabled.

Build 024: P04
- N/A

Build 023: P03
- Tracker 17817: MBE is not generating NMI
- Tracker 17660: Memory Multi-Bit Error is not logged.
- Tracker 16385: Memory Sparing doesn't work as Intel expected result

Build 022: P02
- N/A

Build 021: P01
- N/A

Build 020: RC01
- Tracker 17114: [BEL306] IBUAPI test failed.
- Tracker 16778: [X]Support Type7 (Cache Information) of SMBIOS.
- Tracker 16779: [X]Support Type7 (Cache Information) of SMBIOS.
- Tracker 17158: A password should be required for Floppy-Boot when secure mode
		 boot is enabled.
- Tracker 16521: Single memory should not support memory sparing.
- Tracker 16906: [X] DMI TYPE11 is not updated correctly.
- Tracker 17098: [X] Type11 OEM Strings not fully supported by SMBIOS.

Build 019: B02
- Tracker 16615: POST and Windows 2000 BIOS String do not match.
- Tracker 16065: When no valid RAID array is present, LSI OpROM forces user
		 intervention.
- Tracker 16972: [X] Mixed CPU Speeds are not supported correctly.
- Tracker 16785: [X] Type17 (Memory Device) of SMBIOS is not set to 64bits
- Tracker 16776: [X] SMBIOS Type3 (System Enclosure or Chassis) does not
		 support.
- Tracker 16786: [X] Support Type17 (Memory Device) of SMBIOS not implimented.
- Tracker 16784: [X] Type16 (Physical Memory Array) of SMBIOS not set to 8GB.
- Tracker 16782: [X] Support for Type9 (System Slots) of SMBIOS.
- Tracker 16845: [X] The String is too short in SMBIOS In Type 1~3.
- Tracker 16897: BIOS doesn't display"Keyboard Detected" on the POST Screen.
- Tracker 16787: [X] SMBIOS Type19 (Memory Array Mapped Address) is not
		 correct.
- Tracker 16789: [X] Type20 (Memory Device Mapped Address) of SMBIOS is not
		 correct.
- Tracker 16988: The Onboard VGA is not primary when Dual Monitor enabled.
- Tracker 16931: System will hang at POST if Nvidia PCI-E x16 card installed.

Build 018: B01
- Tracker 16575: Unable to disable PCI Option Rom.
- Tracker 16618: [X] Wrong Error Message displayed when no memory is installed.
- Tracker 16619: [X] Error Message for unsupported memory is incorrect per
		 BIOS spec.
- Tracker 16616: [X] CMOS checksum error will reset date/time.
- Tracker 16526: Some items in BIOS setup should be grayed out instead of
		 hidden.

Build 017: BC08
- Tracker 16431: System  hung up when  LSI20160L is connected in PCI slot.
- Tracker 16493: System can't detect Intel-SRCU32U card when inserted in PCI
		 64 bits slot.
- Tracker 16527: IDE Boot will suspend when floppy controller is disabled.
- Tracker 16523: String Error during POST when Quick Boot is enabled.

Build 016: BC07
- Tracker 16204: **A20+ support for Himem.sys.
- Tracker 16236: System cannot boot form IDE channels unless disable
		 Silicon3124 option Rom.
- Tracker 16408: Memory Information (Type 17 data in SMBIOS) is shown wrong.

Build 015: BC06
- Tracker 16127: Boot Option Command about booting form floppy is malfunction.
- Tracker 15600: Bios Lan console copyright is out of date .
- Changed the copyright string in the bottom of setup menu to 1985-2004.

Build 014: BC05
- Tracker 16043: System crashed at BIOS post when set BIOS second ATA channel
		 to be S-ATA M-S.
- Tracker 16044: Set BIOS to be S-ATA M-S and install SuSE 9.0, the system
		 crashed.

Build 013: BC04
- Bug fixed the incorrect information in the server management setup menu.
- Bug fixed using USB 2.0 CD-ROM to install Win2000 SP4.

Build 012: BC03
- Protect the interrupt mask register to prevent system hang up at checkpoint
  3Ah.
- Bug fixed the incorrect DeviceSet of SMBIOS Type17.
- Tracker 15494: AVL Test fail (the same as #15767).
- Tracker 15767: Insert SCSI card 20160 to 64 bits pci slot and install SuSE
		 9.0, system crashed.
- Tracker 15857: WHQL(11.2)-Unreported Memory and I/O Port test was failed 
		 under Windows.

Build 011: BC02
- Prevent BIOS to hang up at detecting 3th and 4rd IDE channel.
- Bug fixed the incorrect SVID/SSID because the SKU ID is incorrect.
- Tracker 15436: Multi-Bit error Event Log is not recorded!.
- Tracker 15612: [BEL] MEMDAT failed in Real mode.
- Tracker 15747: Amidiag/Processor Test/Plug-n-Play Test Faileed on Fab4-D2D
		 with Bios 2B00 because the flash part is locked.
- Tracker 15756: [ESC] cannot view diagnostic messages.
- Tracker 15626: Monitor Tach Fan 1, 2, 5, 6 failed.
- Tracker 15834: F1 key is ineffective to resume when system event log full.

Build 010: BC01
- N/A

Build 009: A02
- Tracker 15436: Event logging disable is not functional in BIOS setup.
- Tracker 15510: BIOS settings configuration/ wait for 'F1' if error disabled.
- Tracker 15487: Sun Prairie only sees one of the onboard NICs.
- Tracker 15553: 3rd IDE and 4th IDE should not have both Master channel and
		 slave channel.
- Tracker 15492: AC power cycling fail after 98 minutes.
- Tracker 15556: Run warm boot test is fail.
- Tracker 15597: ASR-2200S raid configuration utility can't be invoked.

Build 008: A01
- Tracker 15421: Install SuSE Linux 9.0 fail.
- Tracker 15422: SSU cannot read system event log.
- Tracker 15436: Event logging disable is not functional in BIOS setup.

Build 007: AC03
- Tracker 15394: W2k system will have a blue screen when PCI-E NICs are
		 installed on slot4 and 6.
- Tracker 15382: Hard Disk OS boot time out in Bios Setup Utility doesn't work. 
- Tracker 15383: PXE Boot Timeout in Bios Setup Utility doesn't work.
- Tracker 15393: System hangs in Bios Setup Utility when PCI-E VGA is installed
		 in PCI slot #6.
- Tracker 15389: "Stay On" and "Power Off" of FRB-4 policy in Bios Setup do not
		 work. 
- Tracker 15386: Unreported Memory and I/O Port test of HCT 11.2 was failed.
- Tracker 15174: Password can have characters other than alphanumeric (a-z,
		 A-Z, 0-9). 
- Tracker 15377: Welcome Screen Disappeared when installing RH Linux 8.0/9.0.
- Tracker 15384: PCI Compliance test of HCT 11.2 was failed.
- Tracker 14925: Hyper Threading Function did not disabled or enabled in BIOS
		 setup menu.
- Tracker 14951: System will hang when 39160  plugged with HDD.
- Tracker 15392: PCI-VGA card is not the top priority when it is installed in
		 PCI slot #3, #5. 

Build 006: AC02
- Tracker 15319: 1G onboard lan failed in BIOS 2A00.
- Tracker 15320: PXE boot failed in Bios 2A00.
- Tracker 15336: Keyboard fails to input when Bios Redirection Port is enabled
		 in Bios 2A00. 

Build 005: AC01
- Tracker 14983: Serial Console Features Sub-menu Selection -- Testing Failed.
- Tracker 15149: System cannot load custom default.
- Tracker 15166: System doesn't request users to load defaut after CMOS is
		 cleared.
- Tracker 15182: Security in Bios Setup is not corresponding to Bios EPS.
- Tracker 15165: Some items below Security in Bios Setup Utility should be
		 hidden.
- Tracker 15169: Hot Key can't enforce system to enter Secure Mode.
- Tracker 15175: Redundant words after 3 consecutive incorrect password is
		 entered.
- Tracker 15010: Post Code Changes after booting up to OS.
- Tracker 15011: Going into BIOS setup sometimes screen is blue and sometimes
		 is gray.
- Tracker 15178: F8 fails to load failsafe default.
- Tracker 15124: Front Panel NMI button is malfunction.
- Tracker 15171: Power Switch Inhibit, Reset Switch Inhibit, NMI Control are
		 not workable.

Build 004: X04
- Tracker 14980: System cannot install Windows XP Professional.
- Tracker 15193: COM2 doesn't work with Console Redirection.
- Tracker 14949: System cannot boot from floppy if S-ATA HDD was plugged.
- Tracker 15104: System doesn't halt during posting after CMOS data lost.
- Tracker 15158: system has no warning Beeps with no memory.
- Tracker 15173: The maximum length of password should be 7 characters.
- Tracker 15103: NO memory warning beeps.
- Tracker 15148: System cannot detect COM2.
- Tracker 15150: System hangs during posting.

Build 003: X03
- Tracker 14942: AMIDIAG 6.20 ACPI test failed.
- Tracker 15022: OEM Logo overlapped booting up screen.
- Tracker 14997: L1 and L3 cache size be detected as 0 KB.
- Tracker 15019: MPS Revision selecting item appeared on "MPS Configuration"
		 and "SouthBridge Configuration" at the same time .
- Tracker 14945: System hang up at post screen when BIOS scanning memory.

Build 002: X02
- Tracker 14970: DMA mode of SATA HDD was DMA-2 which detected by BIOS. 

Build 001: X01
- Intiial release.
	 
=============================================================================
                              REFERENCE MATERIAL
=============================================================================
Intel(R) Server Platform SE7320SP2 Technical Product Specification (TPS) 
Intel(R) WorkStation Platform SE7525GP2 Technical Product Specification (TPS) 

Technical Support: http://support.intel.com

[END OF RELEASE NOTES]